1 ? fn8225.3 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copy right intersil americas inc. 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. isl90460 single volatile 32-tap xdcp? digitally controlled potentiometer (xdcp) the intersil isl90460 is a digitally controlled potentiometer (xdcp). configured as a variable resistor, the device consists of a resistor array, wi per switches, a control section, and volatile memory. the wiper position is controlled by a 2-pin up/down interface. the potentiometer is implemen ted by a resistor array composed of 31 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs and u/d inputs. the device can be used in a wide variety of applications including: ? lcd contrast control ? parameter and bias adjustments ? industrial and automotive control ? transducer adjustment of pressure, temperature, position, chemical, and optical sensors ? laser diode driver biasing ? gain control and offset adjustment features ? volatile solid-state potentiometer ? 2-pin up/dn interface ? dcp terminal voltage, 2.7v to 5.5v ? tempco 35ppm/ c typical ? 32 wiper tap points ? low power cmos - active current 25a max. - supply current 0.3a ? available r total values = 10k ?, 50k ?, 100k ? ? temp range -40c to +85c ? packages - 5 ld sc-70, sot-23 ? pb-free plus anneal available (rohs compliant) pinout isl90460 (5 ld sot-23, sc-70) top view vdd gnd u/d rh cs ordering information part number part marking r total (k) temp range (c) package (tape and reel) pkg. dwg. # isl90460wie527-tk ajm 10 -40 to +85 5 ld sc-70 p5.049 isl90460wie527z-tk (see note) ddy -40 to +85 5 ld sc-70 (pb-free) p5.049 isl90460wih527-tk ajv -40 to +85 5 ld sot-23 p5.046 isl90460wih527z -tk (see note) ddz -40 to +85 5 ld sot-23 (pb-free) p5.046 isl90460uie527-tk ajn 50 -40 to +85 5 ld sc-70 p5.049 isl90460uie527z-tk (see note) ddw -40 to +85 5 ld sc-70 (pb-free) p5.049 isl90460uih527-tk ajx -40 to +85 5 ld sot-23 p5.046 isl90460uih527z -tk (see note) ddx -40 to +85 5 ld sot-23 (pb-free) p5.046 isl90460tie527-tk ajo 100 -40 to +85 5 ld sc-70 p5.049 isl90460tie527z-tk (see note) ddu -40 to +85 5 ld sc-70 (pb-free) p5.049 isl90460tih527-tk ajw -40 to +85 5 ld sot-23 p5.046 isl90460tih527z-tk (see note) ddv -40 to +85 5 ld sot-23 (pb-free) p5.046 note: intersil pb-free plus anneal products employ special pb-free material sets; molding compounds/die attach materials and 100 % matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. data sheet october 7, 2005
2 fn8225.3 october 7, 2005 block diagram control and memory up/down (u/d ) device select (cs ) gnd (ground) rh general v cc pin descriptions sot-23/sc-70 5-pin symbol description 1 vdd supply voltage 2 gnd ground 3u/d up - down 4cs chip select 5 rh high terminal/wiper terminal isl90460
3 fn8225.3 october 7, 2005 equivalent circuit absolute maximum ratings recommended operating conditions storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , u/d and v cc with respect to gnd . . . . -1v to +7v lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300c i w (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ma power rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mw temperature range (industrial) . . . . . . . . . . . . . . . . . . -40c to 85c supply voltage (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v caution: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stres s rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not im plied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. potentiometer specifications over recommended operating conditions unless otherwise stated symbol parameter conditions min typ (note 4) max unit r tot end to end resistance w version 8 10 12 k ? u version 40 50 60 k ? t version 80 100 120 k ? v r r h , r l terminal voltages 0 v cc v noise ref: 1khz -120 dbv r w wiper resistance 600 ? i w wiper current 0.6 ma resolution 132taps absolute linearity (note 1) r h(n)(actual) -r h(n)(expected) 1 mi (note 3) relative linearity (note 2) r h(n+1) -[r h(n)+mi ]0.5mi (note 3) r total temperature coefficient 35 ppm/c c h /c l /c w potentiometer capacitances see equivalent circuit 10/10/25 pf notes: 1. absolute linearity is utilized to determine actual wiper voltage vers us expected voltage = (r h (n) (actual) - r h (n) (expected)) = 1 ml maximum. n = 1 .. 29 only. 2. relative linearity is a measure of the error in step size between taps = r h (n+1) -[r h (n) + ml] = 0.5 ml, n = 1 .. 29 only. 3. 1 ml = minimum increment = r tot /31. 4. typical values are for t a = 25c and nominal supply voltage. c h c l r w r total c w r h r l isl90460 fn8225.2 june 6, 2005
4 fn8225.3 october 7, 2005 dc electrical specifications over recommended operating conditions unless otherwise specified. symbol parameter test conditions min typ (note 4) max unit i cc v cc active current (increment) cs = 0v, u/d = f clock = 1mhz and v cc =3v 25 a i sb standby supply current cs = v cc , u/d = v ss or v cc = 3v 0.3 1 a i li cs input leakage current v in = v ss to v cc 1 a i li u/d input leakage current v in = v ss to v cc 1 a v ih cs , u/d input high voltage v cc x 0.7 v v il cs , u/d input low voltage v cc x 0.3 v c in cs , u/d input capacitance v cc = 3v, v in = v ss , t a = 25c, f=1mhz 10 pf timing specifications over recommended operating c onditions unless otherwise s pecified) (figures 1 and 2) symbol parameter min typ (note 4) max unit t cu u/d to cs setup 25 ns t ci cs to u/d setup 50 ns t ic cs to u/d hold 25 ns t ll u/d low period 300 ns t lh u/d high period 300 ns f toggle up/down toggle rate 1 mhz t settle output settling time 1 s cs u/d rh t cu t ci t il t ih t ic t settle figure 1. serial interface timing diagram, increment isl90460
5 fn8225.3 october 7, 2005 pin descriptions rh the isl90460 contains a digital potentiometer connected as a rheostat or variable resistor. the wiper and one terminal of the digital potentiometer is tied to the rh pin, and the other terminal of the potentiometer is tied to the ground pin (gnd). the resistance from the rh pin to ground will vary with the potentiometer setting; at the highest setting, the resistance will be the maximum (rtot), at the lowest setting it will be a minimum. up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in volatile memory when cs is returned high. when cs is high, the device is placed in low power standby mode. principles of operation there are two sections of the isl90460: the input control, counter and decode section; and the resistor array. the input control section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. the resistor array is comprised of 31 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that transfers the connecti on at that point to the wiper. the wiper is connected to the rh terminal, forming a variable resistor from rh to gnd. the direction of the wiper movement is defined when the device is selected. if during cs transition from high to low the u/d input is low, the wiper will move down on each rising edge of u/d toggling. similarly, the wiper will move up on each rising edge of u/d toggling if, during cs transition from high to low, the u/d input is high. the wiper, when at either fi xed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counter does not wrap around when clocked to either extreme. if the wiper is moved several positions, multiple taps are connected to the wiper for t settle (u/d to rh change). the 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. cs u/d rh t cu t ci t il t ih t ic t settle figure 2. serial interface timing diagram, decrement isl90460 fn8225.2 june 6, 2005
6 fn8225.3 october 7, 2005 isl90460 small outline transistor plastic packages (sot23-5) d e 1 e e1 c l c c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 4 5 123 view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p5.064 5 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.036 0.057 0.90 1.45 - a1 0.000 0.0059 0.00 0.15 - a2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 d 0.111 0.118 2.80 3.00 3 e 0.103 0.118 2.60 3.00 - e1 0.060 0.067 1.50 1.70 3 e 0.0374 ref 0.95 ref - e1 0.0748 ref 1.90 ref - l 0.014 0.022 0.35 0.55 4 l1 0.024 ref. 0.60 ref. l2 0.010 ref. 0.25 ref. n5 55 r 0.004 - 0.10 - r1 0.004 0.010 0.10 0.25 0 o 8 o 0 o 8 o - rev. 2 9/03 notes: 1. dimensioning and tolerance per asme y14.5m-1994. 2. package conforms to eiaj sc-74 and jedec mo178aa. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millimeter. converted inch dimen- sions are for reference only.
7 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8225.3 october 7, 2005 isl90460 small outline transistor plastic packages (sc70-5) d e 1 e e1 c l c c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 4 5 123 view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p5.049 5 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.031 0.043 0.80 1.10 - a1 0.000 0.004 0.00 0.10 - a2 0.031 0.039 0.80 1.00 - b 0.006 0.012 0.15 0.30 - b1 0.006 0.010 0.15 0.25 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.009 0.08 0.20 6 d 0.073 0.085 1.85 2.15 3 e 0.071 0.094 1.80 2.40 - e1 0.045 0.053 1.15 1.35 3 e 0.0256 ref 0.65 ref - e1 0.0512 ref 1.30 ref - l 0.010 0.018 0.26 0.46 4 l1 0.017 ref. 0.420 ref. - l2 0.006 bsc 0.15 bsc 0 o 8 o 0 o 8 o - n5 55 r 0.004 - 0.10 - r1 0.004 0.010 0.15 0.25 rev. 2 9/03 notes: 1. dimensioning and tolerances per asme y14.5m-1994. 2. package conforms to eiaj sc70 and jedec mo-203aa. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millimeter. converted inch dimen- sions are for reference only.
|
